Are EDA Engineers Ready for Wafer-Level Package Technology?

• MEPTEC’s (MicroElectronics Packaging and Test Engineering Council’s) Technical Symposium IC Packaging and Test Roadmaps, held November 16, 2006, explored future technology trends and solutions for packaging and test. As demand increases for advanced 65nm and 45nm devices in 2007 and 2008, advanced die-on-substrate and wafer-level package configurations will require new engineering skills and knowledge of the EDA industry.
  
  
  Are EDA engineers ready to partner and/or collaborate with Subcontract Assembly and Test Services (SATS) companies that have never had to deal with the EDA community?
  
  
  The proliferation of applications for consumer electronics is expanding investment by the SATS industry, in innovative package solutions that offer thinner features and smaller form factors. Demand for system-in-a-package (SIP), flip-chip chip scale package (FC- CSP), FC-ball grid array (FC-BGA), and 3D flip-stack packages grew even faster in 2006 for new consumer products (cell phone baseband, digital cameras, laptop PCs) being designed with 90nm memory, microprocessor, and DSP devices. SATS companies are now seeing a transition to package-on-package (PoP) and die-to-die package solutions for next generation 65nm designs in slim phone applications. These new package innovations have technology challenges that involve aggressive substrate design rules, complex pad layout, die, and intricate variables for mold, die attach and laminate design that need to be understood for the packaging industry to move forward. Demands from consumer applications are driving the I/O count upward, pushing the limits of today’s package design capabilities, and making way for even more advanced die and wafer-level processes in 2007 and 2008. Many of the more advanced wafer-level, embedded die or chip-in-substrate structures are material and process driven technologies, for which the infrastructure and business models do not exist in the SATS industry. But the opportunities for collaboration and partnering between design houses, foundries, subcontract assemblers, equipment and material suppliers, and end users are enormous.
  
  
  Mary A. Olsson
  Gary Smith
  Laurie Balch