Gary Smith EDA Consulting in Electronic Design
Gary Smith EDA (GSEDA) is the leading provider of market intelligence and advisory services for the global Electronic Design Automation (EDA), Electronic System Level (ESL) design, and related technology markets.
| Worked with EDA company defining specifications for a Silicon Virtual Prototype (SVP). |
| Worked with microprocessor company exploring new microprocessor heterogeneous cluster architectures. |
| Analyzed the mix of In-House tools and commercial tools, optimizing for best cost/competitive mix. |
| Set standard design language usage throughout a multi-division, multi-location design organization that had been fragmented by acquisitions. |
| Provided short lists or EDA vendors for benchmarking tools, lowering each benchmarking cost by $120,000. |
| Recommended design flows for mixed-signal ICs. |
| Provided comparable tool options for contract negotiations. |
| Worked on an internal team to upgrade the companies Designer from Mainstream to Power users (a four year program). |
| Set purchasing strategies to upgrade EDA vendor support, increasing design team efficiency and decreasing design costs. |
| Held a four month methodology review recommending design team changes that lowered overall costs. |
| Analyzed the use of off-shore resources and associated costs. |
| Restructured purchasing strategies to eliminate the costly purchase of non-optimal or seldom used EDA tools. |
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Industry Note
Gary Smith EDA Activities at DAC -
Wallcharts
2012 Wallcharts: ESL, CAE & CAD-CAM -
Industry Note
Spring and EDP 2012 -
Industry Note
ASP-DAC, the DAC Down Under
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Research Viewpoints
Research Viewpoints Archives | 2008 | 2009 | 2007 | 2010 | 2011
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Market Statistics
Market Statistics Archives | 2009 | 2008 | 2010 | 2011
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Industry Notes
Industry Notes Archives | 2009 | 2008 | 2007 | 2010 | 2011-
ASP-DAC, the DAC Down Under
This was a very interesting ASP-DAC with two main take-a-ways from the conference: Parallel Computing is really, really hard, but we can do it and Homogeneous Computing is Dead.
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1 comments

Cost: FREE
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Mentor and Flowmaster - Thinking Out of the Box
Mentor Graphics has announced that it has acquired the Flowmaster Group, a UK-based provider of computational fluid dynamics (CFD) simulation software. This isn’t the first time Mentor has reached into the mechanical world. Mentor is clearly thinking out of the box here.
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2 comments

Cost: FREE
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Synopsys/ Magma - Great Acquisition, Difficult Merger
Analysis of the Synopsys/ Magma tool sets: why Synopsys bought Magma, what tool markets will be affected and how it will affect the design engineer. Complications with merging the R&D teams. Will Synopsys be able to do a better job than they did with Avanti?
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3 comments

Cost: FREE
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IC CAD and Transactional Memory
The Virtual World is decreasing the sharing of peripheral information. At IC CAD, I learned that IBM is using Transactional Memory in its Super Computer.
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0 comments

Cost: FREE
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Spring and EDP 2012
Don't miss this conference for Design Methodologists in Monterey on April 5&6. Review of compelling agenda including: SoCs and FPGAs; Top 5 EDA problems; EDA in the Cloud; Low Power with Performance: servers, software, ASIPs and Jim Hogan keynote, and 3DICs.
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1 comments

Cost: FREE
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DVCon 2012 Takes on the System Level Verification Challenge
I believe the attempt to move our verification methodologies up into the ESL Architectural level will fail. ESL Behavioral Level is where verification should start. That will cause us to completely rethink our verification approach.
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1 comments

Cost: FREE
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Welcome to 22 nm Design – It Ain’t Going to Be Easy
The transition from 32 nm to 22nm silicon will have a major impact on the design community. You will see more and more design teams deciding to leave the IC Layout portion of the design to the experts.
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3 comments

Cost: FREE
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IBM's Transactional Memory
Why IBM uses Transactional Memory (reliability and parallel computing) and the importance of memory architectures.
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1 comments

Cost: FREE
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The Gigahertz Joke
Dynamic Power in an SoC is controlled by two major variables; Gate Count and Frequency. Once the Power Budget is set, as in the case of mobile designs, designers must trade off these two variables. As the demand for more gates is growing designers are looking at lowering the average frequency of their designs. Microprocessor vendors that are still bragging about their Gigahertz processors are missing the point.
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Cost: FREE
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Wallcharts
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definitions
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Gary Smith DAC Activities
Fri June 08, 2012
All 2012 DAC activities
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Gary Smith EDA DAC Panel
Mon June 04, 2012 9:15-10:15
Trends - What's Hot @ DAC
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DAC: Design & IP Mgnt
Mon June 04, 2012 1:30-2:30
Best Practices
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Cooley's DAC Troublemaker
Mon June 04, 2012 3:00-4:00
Panel, DAC room #256
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GSEDA Sunday Night at DAC
Sun June 03, 2012 7:00-8:00pm
SF Marriott, Salon 6
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Designers Seat Count
Design Engineering seats by CAE, IC & PCB layout; ESL, Semi and PCB/ FPGA pyramid seats
Publish date: July 2012 -
Power or Frequency?
It's not a power problem; it's a frequency problem
Publish date: May 2012 -
What to See at DAC 2012
Annual list of Hot Products
Publish date: June 2012
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DeepChip
Cooley's DAC Troublemaker Panel -
EDA360 Insider
Gary Smith’s Sunday Pre-DAC talk to focus on Multi-platform-based SoC Design Methodology -
EE Times
Mentor's next-gen emulator promises more performance, capacity -
DAC
VIDEO: Gary Smith on What's Hot At DAC 2012 -
DAC
VIDEO: Gary Smith EDA Sunday Night at 49 DAC




























